1. Field of the Invention
Generally, the present disclosure relates to the field of integrated circuits, and, more particularly, to integrated circuits wherein semiconductor-on-insulator techniques are employed.
2. Description of the Related Art
Integrated circuits typically include a large number of circuit elements, which include, in particular, field effect transistors. In a field effect transistor, a gate electrode may be separated from a channel region by a gate insulation layer that provides an electrical insulation between the gate electrode and the channel region. Adjacent the channel region, a source region and a drain region are provided.
The channel region, the source region and the drain region may be formed in a semiconductor material, wherein the doping of the channel region is different from the doping of the source region and the drain region. Depending on an electric voltage applied to the gate electrode, the field effect transistor may be switched between an on-state, wherein there is a relatively high electrical conductance between the source region and the drain region, and an off-state, wherein there is a relatively low electrical conductance between the source region and the drain region.
For improving the performance of integrated circuits including field effect transistors, it has been proposed to employ semiconductor-on-insulator technology. In semiconductor-on-insulator technology, a semiconductor-on-insulator structure is provided. The semiconductor-on-insulator structure includes a thin layer of a semiconductor material, for example silicon, that is provided above a substrate of a semiconductor material, for example silicon. The layer of semiconductor material is separated from the substrate by a layer of an electrically insulating material, for example silicon dioxide. Compared to integrated circuits wherein field effect transistors are formed on a bulk semiconductor substrate, semiconductor-on-insulator technology allows reducing parasitic capacitances and leakage currents. Moreover, integrated circuits formed in accordance with semiconductor-on-insulator technology may be less sensitive with respect to ionizing radiation.
However, semiconductor-on-insulator technology has some specific issues associated therewith, which include the so-called floating body effect. The body of a field effect transistor forms a capacitor with the insulated substrate. In this capacitor, electric charge can accumulate and cause adverse effects, which may include a dependence of the threshold voltage of the field effect transistor on its previous states.
For substantially avoiding the floating body effect, it has been proposed to use fully depleted field effect transistors. Fully depleted field effect transistors are formed using a semiconductor-on-insulator structure wherein the semiconductor layer provided on the insulator layer has a smaller thickness than a channel depletion width of the field effect transistor. Thus, the electric charge and, accordingly, the body potential of the field effect transistor are fixed.
However, fully depleted field effect transistors may be less suitable for some applications, including the processing of input to a digital integrated circuit and output from a digital integrated circuit. For such applications, field effect transistors formed on a bulk substrate may provide more appropriate device characteristics. Moreover, field effect transistors formed on a bulk semiconductor substrate may be of advantage when used in analog integrated circuits.
In view of the situation described above, the present disclosure relates to a structure and a method for the formation thereof that allow using the advantages of semiconductor-on-insulator structures in parallel with devices that may benefit from a bulk semiconductor substrate.